In general, the present invention relates to a semiconductor device and a method of manufacturing the semiconductor device. More particularly, the present invention relates to an effective technique applied to a technology of putting a switching regulator used as a direct-current regulated power supply in an IC (Integrated Circuit).
A direct-current regulated power supply is used for driving electronic devices such as a personal computer and a hand phone or electronic circuits with a high degree of precision and in accordance with specifications. A switching direct-current regulated power supply also referred to as a switching regulator is known as one of direct-current regulated power supplies. A switching regulator once rectifies an alternating-current input voltage into a direct-current voltage and then converts the direct-current voltage back into an alternating-current voltage by using an on/off circuit comprising transistors before again rectifying the alternating-current voltage into a final direct-current output by using a rectification circuit. Control methods adopted by a switching regulator include a pulse-width control technique of controlling the width of pulses generated within a fixed period of time and a frequency control technique of varying the number of generated pulses in accordance with the magnitude of a load.
In the IEEE Transactions on Electron Devices, Vol. 44, No. 11, November 1997, pp 2002 to 2010, there is described a technology of putting a portion of a switching regulator in an integrated circuit. This reference discloses an SJT (Spiral Junction Termination) structure wherein, during a process of putting the switching regulator in an integrated circuit, a resistor element is formed into a spiral shape, and its center portion is connected to a high electric potential while its circumferential portion is connected to the ground electric potential. The resistor element having such a spiral shape is created in an active area.
In Japanese Patent Laid-open No. Hei 9(1997)-186315, on the other hand, there is disclosed an insulated gate bipolar transistor (IGBT) for use in an inverter for reducing a drop in strength to withstand a voltage. This reference discloses typical creation of an over-voltage-suppressing diode by providing an FLR (Field Limiting Ring) on the surface portion of a semiconductor substrate (drift layer) on the circumference (periphery area) of a semiconductor chip and creating the diode on the drift layer with an oxide film sandwiched between the drift layer and the diode. In this example, distribution of electric potentials is optimized to suppress a drop in strength to withstand a voltage by making the device dimensions of the FLR equal to 4/5 times the device dimensions of the over-voltage-suppressing diode.
Nowadays, the alternating-current voltage of the commercial power supply varies from country to country. For example, the alternating-current voltage in Japan is 100 V or 200 V while the voltage is 115 V in the US and 220 V to 240 V in Europe.
A switching regulator has a main switch and a starter circuit for activating the main switch. The starter circuit comprises a starter switch and a start resistor (a resistor element).
In a switching regulator connected to a direct-current power supply operating by rectification of a 240V alternating-current input, a transistor requires a maximum withstand voltage of about 700 V. In order to deliver the switching regulator as a product assuring this maximum withstand voltage, it is necessary to set a design value of the main switch and the starter switch at about 750 V.
A breakdown of any of transistors comprising the main and starter switches is caused by a high voltage applied to the transistor. It is desirable to devise such main and starter switches that an inevitable breakdown occurs on a portion other than the surface of a device with a large area. Concretely, it is desirable to avoid a breakdown of a start resistor element which has a small area and is prone to a breakdown occurring on the surface. However, it is inevitable to have a breakdown occur in a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and a power MISFET (Metal Insulator Semiconductor Field Effect Transistor), which have a large area and are difficult to fall into a state of breakdown occurring on the surface. Thus, if the withstand voltage of a power MISFET is set in the range 750 V to 800 V, it will be desirable to set the withstand voltage of a start resistor at a value of at least 800 V.
Since there is no case in which a start resistor with such a withstand voltage of at least 800 V is included in an integrated circuit, however, it is necessary to launch new developments.
The inventor of the present invention studied the creation of a resistor into a spiral shape as is disclosed in the reference cited above. In an experiment conducted as part of the study, the inventor discovered a phenomenon in which, as the voltage applied to the resistor element increases, its resistance decreases, allowing a large current to flow. Further, since the resistor element is formed in an active region of a semiconductor substrate in which IC is formed, the IC chip increases in size and manufacturing cost increases. In dependence on the layout of the resistor element, a parasitic interaction with another device adjacent to the resistor element may probably occur.
In order to solve the problems described above, the inventor of the present invention has proposed a configuration wherein a resistor element having a zigzag shape is provided on a field insulation layer created on a periphery area of a semiconductor chip in a direction from the center of the semiconductor chip to the circumference thereof and has proposed a technology of preventing the field insulation layer from breaking down due to application of a high voltage. The zigzag portion is extended to cross each ring portions of a plurality of FLRs enclosing an active area of the semiconductor chip in a multiplexed state.
In such a resistor element having a zigzag shape, however, the following problems have been identified. FIGS. 26(a) to 26(c) are diagrams showing results of an analysis of an already proposed technology. To be more specific, FIG. 26(a) shows a model of a zigzag pattern of a resistor layer used as a start resistor SR. FIG. 26(b) shows a cross section of a portion including a resistor layer and FLRs of a driving power IC. FIG. 26(c) shows graphs representing the electric potential of a resistor layer and the electric potential of a semiconductor substrate surface including an FLR. It should be noted that, while 5 FLRs P1 to P5 are described in this analytical study, the number of FLRs is not limited to 5.
In other words, FIG. 26(b) is a diagram showing a cross section of a periphery portion of a semiconductor chip in which a driving power IC is created. The figure shows a semiconductor substrate 1 made of n+ silicon with an nxe2x88x92epitaxial layer 2 created on the main surface thereof.
In the semiconductor chip, a periphery area is located on the periphery of the semiconductor substrate""s active area in which devices such as transistors are created. On the main surface of the epitaxial layer 2 of this periphery area, a field insulation film 3 made of LOCOS (Local Oxidation of Silicon) is created. On the main surface of the semiconductor substrate of the periphery area, that is, on the main surface of the epitaxial layer 2, five field limiting rings (FLRs) 13 are created, enclosing the active area not shown in the figure. Made of a p diffusion layer, the five FLRs 13 are distinguished from each other by assigning reference notations P1 to P5 thereto respectively. It should be noted that a p diffusion layer P0 held at the electric potential GND of the ground is created on the inner side of the FLR P1.
In addition, on the edge of the semiconductor chip, a guard ring 14 is provided. To be more specific, the guard ring 14 is created on the surface of the epitaxial layer 2 under an insulation film 24, which is thinner than the field insulation film 3 and provided at a location separated away from the field insulation film 3. The guard ring 14 is created in a n+ diffusion area having a ring shape. The n+ diffusion area is formed by diffusing impurities into the main surface of the epitaxial layer 2 at a high concentration.
A resistor layer 20 made of a poly-silicon layer is formed on the field insulation film 3. The surface of the resistor layer 20 is covered by an interlayer insulation film 9. A contact hole 21 is formed by boring a location on the interlayer insulation film 9 above the p diffusion layer P0 and a contact hole 22 is formed by boring a periphery location on the interlayer insulation film 9. A contact hole 23 is formed at a location outside the edge of the field insulation film 3. The contact hole 23 is extended to a location outside the insulation film 24, which is thinner than the field insulation film 3 and provided at a location separated away from the field insulation film 3 as described above.
Conductor films 25 to 28 each having a ring shape are created along the periphery of the semiconductor chip on the interlayer insulation film 9. The conductor film 25 is created on the inner side of the periphery area, that is, on the active-area side of the periphery area. The conductor film 25 also fills up the contact hole 21, being electrically connected to the resistor layer 20. The conductor film 26 is created at a location adjacent to the conductor film 25 on the outer side of the conductor film 25 and is electrically connected to the p diffusion layer P0 held at the ground electric potential GND used as a reference electric potential. The conductor film 27 is created above the FLR 13 (P5) on the outermost circumference, being electrically connected to the FLR 13. The conductor film 28 also fills up the contact holes 22 and 23 and is electrically connected to the resistor layer 20 and the guard ring 14.
As an applied voltage is increased in the group of FLRs 13 described above, a depletion layer extends from an FLR 13 on an inner circumference to an FLR 13 on an outer circumference before an avalanche breakdown occurs, resulting in a punch-through structure and, eventually, a breakdown occurs at a pn junction of the FLR 13 on the outermost circumference. By providing a group of FLRs 13 as described above, the strength to withstand a voltage can be increased to a product of a punch-through voltage and the number of FLRs 13. Thus, the withstand voltage of the start resistance SR is equal to the sum of the withstand voltage of the portion comprising the FLRs 13 and a withstand voltage due to, among other factors, the thickness of the field insulation film 3. As a result, the start resistance SR has a total withstand voltage of at least 800 V.
A resistor-layer portion corresponding to the contact hole 21 is the start edge 31 of the resistor element serving as the start resistor SR and a resistor-layer portion corresponding to the contact hole 22 is the end edge 32 of the start resistor SR. A pattern of the resistor layer 20 serving as the resistance SR starting from the start edge 31 to ending at the end edge 32 displays a zigzag shape which has a fixed amplitude and changes the direction at fixed pitch intervals as shown in FIG. 26(a). In FIG. 26(b), however, the zigzag shape is not explicitly shown for the sake of simplicity.
By forming the resistor layer 20 into a zigzag pattern as described above, the length of the resistor layer 20 increases, resulting in a greater heat-dissipating area and a reduced electrical-field intensity. As a result, it is possible to avoid destruction caused by heat dissipated by the resistor element and destruction caused by an excessively strong electric field.
In addition, by forming the resistor layer 20 into a zigzag pattern, it is possible to provide a configuration wherein the resistance per unit length of the resistor layer 20 is increased over the resistance per unit length of a resistor having a shape like a straight line connecting the start edge 31 to the end edge 32.
When a high electric potential is applied to the start resistor SR, electric fields are generated in the start resistor SR and the FLRs 13. By providing the start resistor SR on the field insulation film 3 including an area for placing the FLRs 13 as described above, however, a difference between the electric field generated in the start resistor SR and the electric field generated in the FLRs 13 is reduced. Thus, the field insulation film 3 is relieved from an electric field applied thereto. As a result, destruction of the field insulation film 3 can be avoided.
In accordance with an analysis performed by the inventor and others, the electric potential of the start resistor SR does not exhibit the same variations as the electric potential of the semiconductor-substrate surface including the FLRs 13 as shown in FIG. 26(c). It has also been discovered that the difference between the potentials reaches a maximum value at the FLR 13 on the outermost circumference. This is because, even though the resistor layer 20 having a uniform thickness is formed into a uniform-width zigzag shape varying the direction at fixed pitch intervals from the start edge 31 to the end edge 32, the electric potential varies like a straight line as if the resistor layer 20 were replaced by a straight-line resistor connecting the start edge 31 to the end edge 32 as shown in FIG. 26(c). On the other hand, it has also been discovered that the potential on the surface of the semiconductor substrate, that is, the potential on the boundary surface between the field insulation film 3 and the semiconductor substrate 1 on the portions of the FLRs 13, changes like a staircase as shown in FIG. 26(c) and, in an area on the outer-circumference side of the FLR 13 on the outermost circumference, the potential changes like a curve.
In the portion of the FLR 13 on the outermost circumference, a strong electric field is generated. Electrons of electron-hole pairs generated in bulk are strongly attracted by a poly-silicon layer serving as the resistor layer 20 and many of the attracted electrons are trapped in the field insulation film 3. The electric charge inverts the surface of the nxe2x88x92epitaxial layer 2 between the FLRs 13 on the surface of the semiconductor substrate into a p type, causing a channel leak reducing the strength to withstand a voltage.
The inventor and others conducted a measurement experiment on a driving power IC. FIG. 28 is a diagram showing a measurement circuit of a driving power IC (power MOS chip) The driving power IC has a structure wherein a main switch MS, a starter switch SS and a start resistor SR are embedded monolithically on a silicon semiconductor substrate even though the driving power IC is not specially limited to such a structure. The main switch MS includes a main MOS (MAIN-MOS) comprising 2,270 cells and a current-sensing MOS (CS-MOS) comprising 2 cells for sensing a current. Four electrodes of the main switch MS are connected to a drain terminal DRAIN, a source terminal SOURCE, a gate terminal GATE and a current-sensing terminal CS respectively.
The starter switch SS is a start MOS (START-MOS) comprising 60 cells even though the starter switch SS is not specially limited to such a MOS. 3 electrodes of the starter switch SS are connected to the drain terminal cited above, a start-MOS gate terminal and a start-MOS source gate terminal respectively. The start-MOS gate terminal of the starter switch SS is connected to the common drain terminal by a series start resistor SR of typically 2 Mxcexa9.
With a voltage Vds applied between the common drain terminal of the driving power IC and the other terminals of the main switch MS and the starter switch SS, results of measuring a current Ids flowing from the other terminals of the main switch MS and the drain terminal are represented by a graph shown in FIG. 27.
FIG. 27 is a diagram showing a comparison of a graph representing data obtained at an initial time (at 0 hours) with a graph representing data obtained after an experiment, that is, after a time lapse of 48 hours, with the experiment conducted on a driving power IC in an environment at an ambient temperature of 150xc2x0 C. and a Vds value of 750 V. The graphs represent relations between the voltage (Vds) and the current (Ids) with the horizontal and vertical axes indicating values of the former and the latter respectively.
A discovery is obvious from the curves. That is, the curve representing data obtained at an initial time reveals occurrence of an avalanche breakdown at an applied voltage of about 800 V. On the other hand, the curve representing data obtained after the experiment reveals a phenomenon that, as the applied voltage exceeds a level of about 600 V, a channel-leak current flows, resulting in an increase in current and, at an applied voltage of about 800 V, an avalanche breakdown occurs.
Then, prior to a study of a structure for avoiding such an undesirable phenomenon, a simulation was conducted on an electric potential of the resistor element and an electric potential appearing on the surface of the semiconductor substrate to give the potential curves shown in FIG. 26(c).
The inventor invented the present invention in thinking of making the electric potentials appearing at portions of the start resistor (the resistor element) SR and the electric potentials appearing at portions on the surface of the semiconductor substrate which correspond to the portions on the start resistor (the resistor element) SR agree with each other, or making the latter potentials are approximately close to the former potentials.
It is thus an object of the present invention addressing the problems described above to provide a semiconductor device including an embedded resistor element having a high withstand voltage and a high resistance value and to provide a method of manufacturing the semiconductor device.
It is another object of the present invention to provide a semiconductor device provided with an embedded resistor element having a high withstand voltage and a high resistance value and used for a switching regulator and to provide a method of manufacturing the semiconductor device.
It is a further object of the present invention to provide a technology of allowing a resistor element having a high withstand voltage and a high resistance value to be manufactured without increasing the size of a semiconductor device including the resistor element.
The above and other objects as well as novel characteristics of the present invention will become more apparent from a careful study of this specification with reference to accompanying diagrams.
Outlines of representatives of the present invention disclosed in this specification are briefly described as follows.
1: A semiconductor device comprises:
a semiconductor substrate including an active area, in which a transistor is created, and a periphery area enclosing the active area and having a surface covered by a field insulation film;
a plurality of field limiting rings (FLRs) which are provided on the surface of the semiconductor substrate in the periphery area and enclose the active area in a multiplexed state;
a resistor element created on the field insulation film, being extended in a direction from an inner side of a group of said FLRs to an outer side of the group and connected between a first electrode having a low electric potential of the transistor and a second electrode having a high electric potential of the transistor where the first electrode is a start edge on the inner side of the group of said FLRs and the second electrode is an end edge on the outer side of the group of said FLRs;
an interlayer insulation film covering the resistor element; and
a field plate created on the interlayer insulating film at a location corresponding to the FLR on the outermost circumference and electrically connected to the FLR on the outermost circumference,
wherein, if the resistor element were replaced by a hypothetical equivalent resistor element having a shape of a straight segment connecting the start and end edges of the resistor element, a value of resistance per unit length in a portion of the segment would be different from a value of resistance per unit length in another portion of the segment.
Typically, electric potentials appearing at portions of the hypothetical equivalent resistor element having the shape of a straight segment connecting the start and end edges of the resistor element agree with or are approximately close to electric potentials appearing at portions of the surface of the semiconductor substrate, which correspond to the portions of the hypothetical equivalent resistor element. The sheet resistance of the resistor element is 10 kxcexa9/xe2x96xa1 or less.
An implementation of the semiconductor device described above has:
a first terminal to which a signal is supplied;
a second terminal to which a reference electric potential is supplied;
a control terminal;
a current-sensing terminal;
a starter-circuit control terminal for a starter circuit;
a second starter-circuit terminal to which a reference electric potential of the starter circuit is supplied;
a main-switch transistor serving as a main switch and comprising: a main-switch first electrode connected to the first terminal; a main-switch second electrode connected to the second terminal; a main-switch control electrode connected to the control terminal; and a current-sensing electrode connected to the current-sensing terminal and used for sensing a current output by the main-switch first electrode;
a starter-switch transistor serving as a starter switch and comprising: a starter-switch first electrode connected to the first terminal; a starter-switch second electrode connected to the second starter-circuit terminal; and a starter-switch control electrode connected to the control terminal; and
a start resistor connected in series between the first terminal and the starter-switch control electrode,
wherein the start resistor has the same configuration as the resistor element employed in the semiconductor device described above.
To put it concretely, the resistor element has a zigzag portion between the start and end edges of the resistor element and the zigzag portion has a zigzag pitch varying from location to location. The resistance values per unit length of the resistor segments on the inner and outer sides sandwiching the field limiting ring on the outermost circumference are different from each other.
The configuration of the resistor element has a variety of implementations as follows:
a: In addition to the zigzag portion, the resistor element has a wide zigzag portion with a large zigzag width and a narrow zigzag portion with a small zigzag width.
b: The resistor element has a zigzag portion and a straight portion along the hypothetical segment between the start and end edges of the resistor element.
c: The resistor element has a resistor-line width varying from location to location.
d: The resistor element is a resistor element having a shape like a straight line along the hypothetical segment and a line width at a specific location different from the rest.
e: The resistor element is made of a poly-silicon layer doped with impurities as an additive.
f: The resistor element is made of a metallic portion and a poly-silicon layer doped with impurities as an additive and connected to the metallic portion.
g: The resistor element has a sheet-resistance value varying from location to location.
h: The thickness of the field insulation film, on which the resistor element is created, is set in the range about 3 to 5 xcexcm to reduce the intensity of an electric field developed between a location on the resistor element and the corresponding location on the surface of the semiconductor substrate.
Such semiconductor devices are fabricated by adopting the following methods.
A method is adopted for manufacturing a semiconductor device comprising:
a transistor created in an active area of a main surface of a semiconductor substrate; and
a plurality of field limiting rings provided to enclose the active area in a multiplexed state.
The method comprises processes of:
creating the field limiting rings enclosing the active area of a main surface of the semiconductor substrate in a multiplexed state;
creating a field insulation film at a predetermined location and in a periphery area of the semiconductor substrate; and
creating a resistor layer on the field insulation film, being extended in a direction from a start edge on an inner side of a group of said field limiting rings to an end edge on an outer side of the group to be used for creating a resistor element connected to the transistor.
In the method described above, the resistor layer is created into such a pattern that, if the resistor element were replaced by a hypothetical equivalent resistor element having the shape of a straight segment connecting the start and end edges of the resistor element, a value of resistance per unit length in a portion of the segment is different from a value of resistance per unit length in another portion of the segment.
The resistor layer is created into such a pattern that electric potentials appearing at portions of the hypothetical equivalent resistor element having the shape of a straight segment connecting the start and end edges of the resistor element agree with or are approximately close to electric potentials appearing at portions of the surface of the semiconductor substrate, which correspond to the portions of the hypothetical equivalent resistor element.
Any of the following patterns can be created on the resistor layer by creation of a conductor layer, patterning and deposition using a mask: a zigzag pattern, a zigzag pattern with a zigzag pitch at a specific location different from the rest, a zigzag pattern with a zigzag width at a specific location different from the rest, a pattern combining any of the above patterns with a straight-line portion, any of the above patterns with a resistor-line width varying from location to location and a straight-line pattern with a resistor-line width varying from location to location.
The transistor is created as a field effect transistor and, in a process to form a gate electrode of the transistor from a poly-silicon layer, the resistor layer is created at the same time from the poly-silicon layer and, if necessary, the value of sheet resistance is adjusted by doping with impurities as an additive.
2: In configuration 1 described above, the resistance of the hypothetical equivalent segment resistor having the shape of a straight line connecting the start and end edges of the resistor element is set so that the resistance value per unit length varies along the segment like a staircase that electric potentials appearing at locations on the resistor element agree or are approximately close to electric potentials appearing at locations on the surface of the semiconductor substrate.
3: In configuration 1 or 2 described above, each of the field limiting rings is connected to the resistor element""s portion corresponding to the field limiting ring.
In the manufacture of such a semiconductor device, after creation of a field limiting film, a field insulation film, a resistor layer, and an interlayer insulation film covering the resistor layer, contact holes are formed by boring the interlayer insulation film and conductors are selectively created on the interlayer insulation film to electrically connect the field limiting rings to the resistor element""s portions corresponding to the respective field limiting rings through the contact holes.
In accordance with a first configuration 1 described above,
(a) Electric potentials appearing at locations on the hypothetical equivalent segment resistor having the shape of a straight line connecting the start and end edges of the resistor element agree or are approximately close to electric potentials appearing at locations on the surface of the semiconductor substrate which correspond to the respective locations on the hypothetical equivalent segment resistor. Thus, hole-electron pairs generated in bulk are not attracted by an electric field to a specific location even if a high voltage is applied to the resistor element serving as a start resistor. As a result, generated pairs of holes and electrons of the pairs recombine, neutralizing each other. Therefore, no channel is developed between the field limiting rings so that the withstand voltage is stabilized, preventing the strength to withstand a voltage from deteriorating.
(b) By setting the sheet resistance of the resistor layer on which the start resistor is created at 10 kxcexa9/xe2x96xa1 or smaller, it is possible to avoid an increase in temperature caused by a decrease in resistance. Thus, the amount of dissipated heat at a certain applied voltage can be stabilized. In addition, by forming the resistor layer into a zigzag shape, it is possible to increase the length of the resistor layer. With the length increased, the area dissipating heat is widened so that the heat dissipation efficiency is also raised. As a result, it is possible to avoid a destruction incident caused by fusion of the poly-silicon layer serving as the resistor layer due to dissipated heat.
(c) With schemes (a) and (b) described above, it is possible to provide a highly reliable semiconductor, that is, a driving power IC used in a switching regulator.
(d) Since the start resistor is created on the field insulation film on the periphery area instead of the active area, the size of the semiconductor chip can be made small and the cost of manufacturing the semiconductor device can also be reduced in comparison with a structure wherein the start resistor is created on the active area.
In accordance with configuration 2 described above, it is possible to prevent the strength to withstand a voltage from deteriorating and avoid a destruction incident caused by heat dissipated by the poly-silicon layer serving as the resistor layer as is the case with configuration 1.
In accordance with configuration 3 described above, the field limiting rings are electrically connected to the resistor element""s portions corresponding to the respective field limiting rings so that, at each of the connections, the electric potential of the field limiting ring is equal to the electric potential of the resistor element""s portion electrically connected to the field limiting ring. Thus, electric potentials appearing at locations on the segment resistor agree or are approximately close to electric potentials appearing at locations on the surface of the semiconductor substrate which correspond to the respective locations on the segment resistor as is the case with configuration 1. As a result, it is possible to avoid a destruction incident caused by heat dissipated by the poly-silicon layer serving as the resistor layer